Sensoray 425 Bedienungsanleitung PDF herunterladen (Seite 17)

Page 15 Sensoray Model 425 Instruction Manual

DAC Data Ports

For each analog output channel, DACxLSB receives

the least-significant data byte, and DACxMSB receives

the most-significant data nibble.

Each DAC is allocated two

bus register ports, designated

DACxLSB and DACxMSB

(where x is the DAC identifier

0, 1, 2, or 3). All DAC set-

point data are written into

these registers. Offsets from

the board base address are

shown in the table to the right:

Address

Offset

Function

0 DAC0LSB

2 DAC0MSB

4 DAC1LSB

6 DAC1MSB

8 DAC2LSB

10 DAC2MSB

12 DAC3LSB

14 DAC3MSB

In the case of the DACxMSB registers, the data nibble

is right-justified and the high nibble is ignored. Data

may be written to DACxLSB and DACxMSB registers

in any order.

Note: DAC outputs do not change when the DACxLSB

and DACxMSB registers are written to. Outputs

change only when the LDAC port is read (see next

section).

DAC x LSB Register (write only)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

x x x x x x x x D7 D6 D5 D4 D3 D2 D1 D0

DAC x MSB Register (write only)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

x x x x x x x x x x x x D11 D10 D9 D8

LDAC Port

DAC outputs change when data is transferred from the

bus registers to the DAC output registers. The LDAC

port is used to invoke such transfers.

Reading from the LDAC port transfers data to all four

DAC output registers simultaneously.

The value read from the LDAC port is indeterminate.

Transfer Function

DAC Initialization

Before setting the DAC Enable Register to enable the

analog outputs, the ISAbus master should first zero all

DAC output registers.

LDAC port (base + 0, read only) : Update DAC outputs

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

x x x x x x x x x x x x x x x x

Input coding for DAC

channels is 12-bit

unsigned binary. The rela-

tionship between input

code and analog output

voltage is illustrated in the

table shown to the right:

Code

(hex)

Output

(Volts)

000 0.0000

001 0.0024

... ...

7FF 4.9976

800 5.0000

801 5.0024

... ...

FFF 9.9976

A typical application should follow this sequence to

achieve orderly startup following a reset:

• Write zeros to all DACxLSB and DACxMSB registers.

• Read from the LDAC port to zero all DAC outputs.

• Enable DAC outputs via the Control port.

Channel Differences

DAC channel 0 is identical to the other channels except

for the addition of a remote sense function.

Each channel has an output source impedance specified

at 85 ohms, maximum. Because channel 0 senses the

DAC output after its CMOS switch, however, its

effective source impedance is zero for output currents

up to the specified maximum.

Because of their 85 ohm source impedances, channels

1, 2, and 3 will tend to exhibit “gain error” as a

function of load current. This is generally not a

problem in control applications as long as the load

current is constant, and hence, DAC output voltage is

monotonic.

Use channel 0 if load impedance varies significantly or

absolute accuracy is important for your application.

Alternately, any of the channel 1, 2, or 3 outputs may

be externally buffered.

1 2 ... 12 13 14 15 16 17 18 19 20 21 22 ... 33 34

Kommentare zu diesen Handbüchern

Keine Kommentare

Sensoray 425 Bedienungsanleitung Seite 17

Kommentare zu diesen Handbüchern

Verwandte Produkte und Handbücher für Hardware Sensoray 425